Alperen A.

If your measurement system has to be trusted, I design it end to end: analog front-end, mixed-signal PCB, FPGA/firmware, and bench validation, all by one engineer. I'm a generalist who specializes in precision analog design and high-speed PCB design, building data acquisition (DAQ) systems and precision instrumentation for test and measurement, industrial, and scientific products.

The person who routes your ground planes and guard rings also writes the ADC driver and sampling ISR, so there are no handoff losses and no "works in hardware, breaks in firmware" surprises. One engineer means fewer handoffs, fewer respins, and less billed time. Every system is brought up and characterized in my own lab (noise floor, sample-rate accuracy, linearity) and delivered with a showcase GUI, so you can see the proof and use the system from day one.

Recent DAQ systems, delivered from analog front-end to RTL and firmware:
⚫ 125 MSPS, 8-channel, 12-bit ADC system on Zynq-7000
⚫ 1 GSPS, dual-channel, 8-bit ADC system on Zynq-7000
⚫ 16-bit, 15 MSPS wide-bandwidth system resolving signals down to 20 µV
⚫ 24-bit, multi-channel DAQ for precision measurement
⚫ FPGA-based acquisition platform with LPDDR4 waveform memory and a PCIe Gen4 host interface

➡️ 𝗣𝗿𝗲𝗰𝗶𝘀𝗶𝗼𝗻 𝗮𝗻𝗮𝗹𝗼𝗴 𝗳𝗿𝗼𝗻𝘁-𝗲𝗻𝗱𝘀 (𝗰𝗼𝗿𝗲 𝘀𝗽𝗲𝗰𝗶𝗮𝗹𝘁𝘆)
Instrumentation amplifiers, PGAs, precision op-amp chains and voltage references for 16 to 24-bit delta-sigma and SAR analog-to-digital converters (ADCs). ADC drivers designed for settling time and low noise using SPICE simulation with AI-assisted optimization loops that sweep component values and topologies, plus anti-aliasing filters and noise-aware layout that protect your ENOB.

➡️ 𝗛𝗶𝗴𝗵-𝘀𝗽𝗲𝗲𝗱 𝗺𝗶𝘅𝗲𝗱-𝘀𝗶𝗴𝗻𝗮𝗹 𝗣𝗖𝗕 𝗱𝗲𝘀𝗶𝗴𝗻 (𝗰𝗼𝗿𝗲 𝘀𝗽𝗲𝗰𝗶𝗮𝗹𝘁𝘆)
Up to 12 layers with HDI, 1156-pin BGAs, 0.35 mm pitch, and 1000+ component boards. PCIe Gen4, LPDDR4, USB 3.x and LVDS with strict signal integrity (SI), power integrity (PI) and EMI/EMC discipline, so precision analog and fast digital coexist on one board. I deliver native Altium Designer or KiCad projects.

➡️ 𝗗𝗔𝗤 𝗮𝗻𝗱 𝗙𝗣𝗚𝗔 𝗱𝗲𝘀𝗶𝗴𝗻
Verilog/VHDL RTL, clocking and trigger architectures for exact, repeatable sample rates, and high-throughput data paths: LPDDR4 waveform buffering, USB 3.x, Gigabit Ethernet, PCIe Gen4.

➡️ 𝗗𝗲𝘁𝗲𝗿𝗺𝗶𝗻𝗶𝘀𝘁𝗶𝗰 𝗲𝗺𝗯𝗲𝗱𝗱𝗲𝗱 𝗳𝗶𝗿𝗺𝘄𝗮𝗿𝗲
Bare-metal C for STM32, ARM Cortex-M, PIC and ESP32, with DMA- and interrupt-driven sampling, minimal jitter, and register-level peripherals (SPI, I2C, USB, CAN, timers).